Recently, the speed and channel capacity of communication networks have been steadily increasing. The scale of circuits performing amplification and waveform-shaping of high-speed electrical signals exchanged over such communication network tends to increase. On the other hand, there is a need to decrease power consumption of the circuits. Thus, strict conditions are imposed on design of such circuits. Meanwhile, to perform amplification and waveform-shaping of high-speed electrical signals, such circuits often have, for example, a multi-stage configuration in which a plurality of amplifier circuits are connected in series (see, for example, Japanese Unexamined Patent Application Publication Nos. 2008-236515 and 2006-279599).
However, in the foregoing related art, when threshold voltages of transistors in circuits fluctuate because of process variation of the transistors, the fluctuation unfortunately decreases a margin of circuit design. The fluctuation of the threshold voltages of the transistors makes direct-current (DC) potential design difficult particularly in semiconductor integrated circuits achieving both the amplification and waveform-shaping of high-speed electronic signals and the decrease in power consumption.